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The Production Linked Incentive (PLI) scheme for the semiconductor industry was launched in December 2021 with an outlay of INR 76,000 crore (~ US$ 10 billion), marking the first national programme to target this strategic industry. The PLI scheme is the government’s preferred policy tool to boost India’s manufacturing capabilities by providing incentives based on incremental output. Currently, this scheme is applied across 14 sectors of the Indian economy. The PLI scheme for semiconductors is the government’s largest commitment to any industry, highlighting the industry’s importance. In comparison, the second and third largest outlays under the PLI scheme were given to automobile (INR 25,938 crore) and advanced chemistry cell (INR 18,100 crore) manufacturing, respectively. It has attracted several companies to establish semiconductor manufacturing units in India, marking significant progress in its semiconductor sector. Five projects are in the pipeline under the PLI scheme. However, it is important to evaluate the scheme to highlight and overcome potential pitfalls and ensure long-term success.
The PLI scheme is the government’s preferred policy tool to boost India’s manufacturing capabilities by providing incentives based on incremental output.
Structure of the scheme
The PLI scheme for semiconductors aims to build manufacturing capabilities in semiconductor foundries, Assembly, Testing, Marking and Packaging (ATMP)/ Outsourced Semiconductor Assembly and Test (OSAT)[1] facilities and display fabrication facilities.[2] The scheme offers to cover 50 percent of the project cost for setting up the manufacturing facilities, with some states offering additional incentives. However, these subsidies don’t go to every manufacturer in the sector. The projects are selected based on investment, revenue thresholds, technology, and capacity, as shown in Table 1.
Table 1: Eligibility criteria for different types of manufacturing under PLI for semiconductors
Type of Manufacturing |
Investment Threshold |
Revenue Threshold* |
Technology |
Capacity |
Silicon Semiconductor Fabrication Facility |
INR 200 billion |
INR 75 billion |
300mm wafer size |
40,000 wafter staters per month |
Display Fabrication Facility |
INR 100 billion |
INR 75 billion |
Generation 8 or above for TFT LDC OR Generation 6 or above for AMOLED |
60,000 Panels/ month or more for TFT LCD OR 30,000 Panels/ month or more for AMOLED |
ATMP/OSAT |
INR 500 million |
n/a |
150/200 mm or more |
500 or more wafer starts/ month |
Source: Author’s compilation based on scheme documents available on the India Semiconductor Mission website
*Including Group Companies revenue in any of the three financial years preceding the year of submission
Once the project is selected, the government disburses the incentives on a pari-passu basis, meaning the subsidy payments are available immediately up-front to the company. The subsidy is deposited into a bank account created by the beneficiary, called the “No-Lien Account” (NLA). This account helps track the flow of funds and avoid diversions towards non-project purposes. The subsidy is disbursed in several instalments. The first is released after the beneficiary has mobilised its share of the funding and deposited it into the NLA. Subsequent instalments are made only after the beneficiary submits a project report. The process continues until the full amount of eligible fiscal support has been provided.
The scheme’s focus on R&D is relatively low, especially considering how crucial it is for fostering innovation and competitiveness within the semiconductor industry.
Once the subsidy disbursement process begins, the beneficiaries are subject to certain accountabilities. They must (i) submit self-certified Quarterly Review Reports (QRRs), (ii) submit an undertaking affirming it will maintain production for at least three years once commercial production begins, and (iii) adhere to timelines stating that the entire project must be operated within six years of approval.
Potential pitfalls
1. Insufficient focus on Research and Development (R&D)
The PLI scheme has set aside 2.5 percent of its outlay towards R&D. The scheme’s focus on R&D is relatively low, especially considering how crucial it is for fostering innovation and competitiveness within the semiconductor industry. Moreover, the R&D spending under the PLI scheme lacks clear direction, with no specified goals or priority areas outlined.
The PLI scheme should be amended to include specific R&D goals such as advancing research on packaging, testing, manufacturing technology and workforce development. Increasing investment in R&D and fostering partnerships with academic research institutes would enhance the PLI scheme’s effectiveness. Further, establishing a national focal point for semiconductor research, similar to the National Semiconductor Technology Centre in the United States, would strengthen India’s research capabilities.
2. Lack of clear strategy for manufacturing
The PLI scheme provides equal incentives across different processes of semiconductor manufacturing. However, India’s capabilities may align equally with each part of the manufacturing process. For example, the government’s plans to increase fabrication facilities may be overly ambitious for India. Establishing a fabrication facility is highly capital-intensive, with investments often exceeding US$ 20 billion. Subsidising a fabrication unit is a huge cost for the government, like with the PSMC (Powerchip Semiconductor Manufacturing Corporation)-TATA project worth INR 91,000 crore, of which 50 percent was subsidised under the PLI scheme. It is also not an opportune moment to enter fabrication manufacturing supply chains. Due to geopolitical developments, several countries are working towards setting up their semiconductor fabrication facilities to reduce reliance on global supply chains. The race among countries to build their fabrication plants may lead to a fragmented global semiconductor market and excess supply in manufacturing capacity worldwide. India is a new entrant in the manufacturing value chain, and investing in fabrication plants may not lead to the dividends it hopes to reap.
Firms historically have set up ATMP facilities in the developing world, as this part of the value chain is labour-intensive. It is considered a lower-value addition in manufacturing compared to fabrication.
Instead, the PLI scheme can be more strategic by identifying an area where India can quickly scale up and establish itself in global supply chains. ATMP/OSAT presents an opportunity for India because of its lower barriers to entry. Firms historically have set up ATMP facilities in the developing world, as this part of the value chain is labour-intensive. It is considered a lower-value addition in manufacturing compared to fabrication. However, innovative opportunities in advanced packaging have emerged, allowing for a greater value addition. India has a cost advantage in ATMP and can follow the examples of South Korea and Taiwan, which moved on to more complex value chain processes after becoming proficient in ATMP /OSAT.
3. Capacity constraints
The India Semiconductor Mission (ISM) faces the risk of capacity constraints. It currently operates as an 18-person team that has a wide range of responsibilities to take care of. ISM’s responsibilities include verifying beneficiaries’ claims, submitting regular reports to the Ministry of Electronics and Information Technology (MeitY), conducting a mid-term appraisal of the scheme and continuous project monitoring. All of these processes are resource-intensive, and limited staff capacity can create bottlenecks. Moreover, ISM’s responsibilities are set to increase soon as the government plans to introduce a larger second package under the PLI scheme for semiconductors. This expansion will require ISM to assess high-value projects and coordinate with multiple government agencies and private companies, which may cause further strains. New projects approved under the scheme will add to ISM’s continuous assessment and monitoring workload.
Therefore, bringing in external experts for technical assistance and compliance audits can help relieve some of the workload. Additionally, the core team can be expanded to handle various operational needs.
4. Lack of clear time-bound goals and milestones
Although the PLI scheme outlines broad objectives, it lacks detailed, time-bound and quantitative milestones to track progress. Without clear timelines and intermediate goals, assessing performance, identifying bottlenecks and adjusting strategies will prove to be difficult. Well-defined milestones can also increase transparency and accountability.
Enhancing R&D support and refining focus areas within the semiconductor value chain are crucial for long-term success.
Conclusion
The PLI scheme for the semiconductor industry is a pivotal step towards establishing India as a global manufacturing hub. However, it is essential to address key challenges. Enhancing R&D support and refining focus areas within the semiconductor value chain are crucial for long-term success. A more targeted strategy to develop India’s ATMP/OSAT manufacturing capabilities, making them globally competitive, is needed to ensure more effective use of funds. Additionally, addressing ISM’s capacity constraints and incorporating time-bound milestones into the PLI scheme will improve accountability and help track progress. With these adjustments, the PLI scheme can better align with India’s strengths and help it thrive in the global semiconductor industry.
Anika Chhillar is a Research Intern at the Observer Research Foundation.
[1] 1ATMP (Assembly, Testing, Marking and Packaging) refers to the post-fabrication stage of semiconductor manufacturing, where wafers are assembled, tested, marked and packaged into final chips. OSAT (Outsourced Semiconductor Assembly and Test) companies offer these backend services, enabling chip manufacturers to outsource assembly and testing to reduce costs and access advanced technologies.
[2] Display Fabrication Facilities are specialised factories where various types of display panels, such as LCD, OLED, and MicroLED, are manufactured.
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